IC Back End Design

Our silicon design service encases a wide range of capabilities, from Front End design in Analog Circuit, Digital Logic, DFx, Device Functional Verifications etc to Back End Design in custom layout, structural design/auto place & route, timing analysis, physical verification as well as full chip integration. We have competent resources in various semiconductor manufacturing nodes including World Top Notch 10nm & below finFET technology in order to provide high value to our international MNC clients.
 
Industry Experiences & Segments
  • Smartphone SoC & Chipsets
  • Computing SoC & Chipsets
  • Graphic Chips (GPU)
  • FPGAs
  • A.I. Chips
  • Automotive Electronics (MCU, ECU, Sensors, Power Regulator)
Process Nodes Design Knowhow
  • Bipolar CMOS DMOS (150nm/130nm/90nm)
  • 55nm, 40nm, 28nm, 20nm
  • 16nm finFET
  • 14nm finFET
  • 10nm finFET
  • 7nm finFET
 

 

Back End Design Functions
  • Analog Custom Layout
  • Structural Design / Auto Place & Route
  • Physical Verification
  • Full Chip Integration
  • Timing Analysis

 

Deals with further design implementation that have manufacturing and fabrication process limitations & design rules.

Floorplanning and power planning: the physical design process starts with floor planning, where engineers deal with the core level circuit. They decide where and how to place and route basic blocks, the power requirements of the circuit and how to utilize it efficiently.

Placement: To locate the basic components and eliminate any timing constraints.

Clock tree synthesis: As the circuit may use multiple clock sources such as PLLs, oscillators etc. a proper synchronization must be provided.

Physical verification: This is done after completing the routing process. It is needed to inspect the process output and physical verification tools that are needed to look for signoff LVS and DRC checks.